Company Name: Aristo
Description: Aristo Technology, Inc. is a company that is involved in the development and marketing of assembly tools and block-based design planning. These tools are automated and intended for complex integrated circuits or ICs and systems-on-a-chip or SOC.
The IC Wizard products of the company are designed specifically for cutting-edge communications, consumer and computer products that are capable of performing performance-sensitive or complex operations and which utilize huge numbers of physical blocks. The said product also employs semiconductor processes of 0.25 microns and below.
The company is a partner in the in-Sync programs of the Cadence Design Systems’ Connection and Synopsys. Aristo is a privately-held company and is funded by Intel, LVP, ITV and USVP.
Aristo Technology, Inc. was founded in 1996 in Cupertino, California by Simon Bloch, the company president and chief executive officer. It was acquired by Monterey Design Systems in 2001. The surviving name of the Aristo-Monterey merger was Monterey with Jacques Benkoski as president and CEO. The personnel of Aristo then moved into the company headquarters of Monterey in Sunnyvale, California.
Three years after its inception, Aristo Technology, Inc, made an announcement that Gigapixel Corporation, Inc. was going to adopt the IC Wizard in order to hasten the implementation of the soft RTL blocks into test chips for validation purposes. The said announcement was made after another announcement that had been made a month earlier involving the company’s partnership with the largest supplier of 3D graphics accelerators, ATI.
The use of the IC Wizard would reportedly improve the engineering productivity of Gigapixel and at the same time move the said company toward what is called a convergence of single-pass timing. Moreover, the Aristo’s IC Wizard plugs into Gigapixel’s present Cadence and Synopsys design environment. The use of the Aristo product would enable Gigapixel to eliminate costly floor plan iterations, achieve an early chip-level parasitic estimation, reduce the time from the last logic change to tape-out mere hours instead of weeks and achieve scalability by allowing blocks that are concurrently-designed.
The assembly tools and design planning of IC Wizard facilitate the acceleration of design convergence and increase design productivity via a highly automated “divide-and-conquer” or block-based approach. Alternatives for multiple design plans generated by the IC Wizard meet the constraints for area, routability, power and timing in days as compared to the number of months it typically takes when traditional methodologies are employed.
The said tool may be utilized in the process of architectural, physical, structural and RTL design stages and may be plugged into pre-existing design flows so that customers could employ it for immediate design requirements while at the same time preserving their previous investment in existing tools.
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